Questions tagged [cortex-m]
For all ARM Cortex-M series cores, including M0, M0+, M1, M3, M4, M7, M23 and M33.
cortex-m
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Local variable allocation crashes the stack in embedded C on cortexm4 and operating system
Details: embedded C, cortex M4 with operating system (RTX Kernel), compiled with ARM Compiler V5.06 update6 and Microlib.
Inside a periodic task there are some functons call, one is a debug function:
/...
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ARM Cortex M4 context switching: How does the hardware know where xPSR, PC, LR, R12, R3-R0 are on the stack?
I'm working on a context switching mechanism for my RTOS which runs on Cortex-Ms.
When I initialize a task's stack, I have it like this
Then, I decrement the stack pointer 8 times to fit R11-R4.
I ...
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Is the libsnark library compatible with the arm-none-eabi toolchain for ARM Cortex-M microcontrollers?
I am currently working on a project that involves implementing cryptographic protocols on ARM Cortex-M microcontrollers, specifically the Raspberry Pi Pico (RP2040). I am interested in using the ...
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Can i boot from sram when i use arm cortex m3
normally,we boot from flash or ROM, but what if i want to boot from SRAM area(0x20000000_0x3fffffff) instead of Code area(0x00000000_0x1fffffff), should i use startup.s to copy the code to SRAM area?
...
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Unwinding Stack on Cortex-M with FreeRTOS: Handling Interrupts and Stopping Conditions
I am writing an unwinder for a Cortex-M (an ARM processor) running FreeRTOS. It mostly works, and I can trace the stack in many cases, but I have encountered a few issues that I haven't been able to ...
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Taking FreeRTOS as an example, how to separate the kernel from the application? (Physical)
enter image description hereBackground: FreeRTOS, Cortext-M3
Suppose there is a situation where the kernel and application are developed separately, and the .text segment of the kernel and the ...
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How/When exactly does Cortex-M4 (STM32 F4) switch its R13 from MSP to PSP? Do i have to manually switch if using PSP in inline asm?
I'm writing my own RTOS and I'm implementing the context switch function, where I have to use PSP. The function is written in inline assembly
I was working on another project on STM32 F4 writing ...
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Missing ELF symbol for extern const float?
I have seen Missing ELF symbol "var" when using GDB? , but this is a different issue.
I am using gdb with RP2040 over openocd. Unfortunately I cannot provide a full code that reproduces the ...
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How to correctly implement delay after enabling RCC peripheral clock?
I'm new to STM32 microcontrollers. I would like to know how to correctly implement 2-clock-cycle delay after enabling RCC peripheral clock.
Section 5.2.16 (page# 134) of https://www.st.com/resource/en/...
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Embedded C++ - Header-only library optimization level
I mainly develop firmware for ARM Cortex M using gcc and I am migrating from C to C++ and even though I am overall happy with the transition, there are some things that I just can't get right.
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Build valgrind to target LPC55S69(which is based on Armv8-m architecture)
I'm trying to build valgrind to target baremetal arm cortex-m (based on armv8-m architecture). The host is a x86 wsl environment. How do I specify this while trying to configure valgrind.
For ex: To ...
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37
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ARM Cortex-M Trustzone (ab)use to isolate third party application
I am new to trustzone on the Cortex-M and am wondering if I can use it to isolate a third party application from a bunch of legacy code.
The idea would be to move the legacy code with freertos into ...
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VSCode Arduino environment, SAMD51J19A, persistent DummyHandlers
I've been developing an embedded application for months for an Adafruit Feather M4 Express board. I'm using the VSCode Arduino environment, and it's been going well, up until:
After putting down the ...
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How to determine if interrupts are enabled Arm Cortex M4F (STM32G44)
I have a function that is called when the interrupts are enable and other times when disabled and it must behave different depending on the interrupt enabled state.
I reviewed the reference manual but ...
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Can I service the SysTick interrupt while already in HSEM interrupt (STM32H745, M4 core)?
I have a situation where my software enters a HSEM interrupt (with the M4 core) and while it is servicing that interrupt it is ignoring the SysTick interrupt. Exiting the HSEM interrupt is dependent ...
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