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1 vote
0 answers
52 views

Local variable allocation crashes the stack in embedded C on cortexm4 and operating system

Details: embedded C, cortex M4 with operating system (RTX Kernel), compiled with ARM Compiler V5.06 update6 and Microlib. Inside a periodic task there are some functons call, one is a debug function: /...
Catosh's user avatar
  • 315
2 votes
0 answers
50 views

ARM Cortex M4 context switching: How does the hardware know where xPSR, PC, LR, R12, R3-R0 are on the stack?

I'm working on a context switching mechanism for my RTOS which runs on Cortex-Ms. When I initialize a task's stack, I have it like this Then, I decrement the stack pointer 8 times to fit R11-R4. I ...
Tsz Kit Koon's user avatar
1 vote
1 answer
52 views

How/When exactly does Cortex-M4 (STM32 F4) switch its R13 from MSP to PSP? Do i have to manually switch if using PSP in inline asm?

I'm writing my own RTOS and I'm implementing the context switch function, where I have to use PSP. The function is written in inline assembly I was working on another project on STM32 F4 writing ...
Tsz Kit Koon's user avatar
3 votes
1 answer
53 views

Missing ELF symbol for extern const float?

I have seen Missing ELF symbol "var" when using GDB? , but this is a different issue. I am using gdb with RP2040 over openocd. Unfortunately I cannot provide a full code that reproduces the ...
sdbbs's user avatar
  • 5,129
0 votes
2 answers
47 views

Can I service the SysTick interrupt while already in HSEM interrupt (STM32H745, M4 core)?

I have a situation where my software enters a HSEM interrupt (with the M4 core) and while it is servicing that interrupt it is ignoring the SysTick interrupt. Exiting the HSEM interrupt is dependent ...
Alex Jegers's user avatar
1 vote
0 answers
48 views

MCU SysTick infinite loop

During the development of an embedded device, I encountered a one time bug with no interruptions working. It's important to understand that this device usually works fine, and has been for a few years ...
mescande's user avatar
0 votes
1 answer
77 views

Unable to read value from gpio set as input

I am working on a custom board with two IMX7ULP. The thing I'm trying to do seems quite simple, the A7 from one IMX7ULP send a signal to the M4 of the other IMX7ULP, just an electrical signal, one of ...
Nathan's user avatar
  • 1
0 votes
1 answer
88 views

Can't connect ST-Link with APM32F003 through OpenOCD

I'm using CLion and try to debug my APM32F003 base project with ST-Link. I cannot determine what the problem is with ST-Link. I'm using Geehy's OpenOCD build with APM32F003 config files. My project ...
ReasonX's user avatar
  • 31
-1 votes
1 answer
111 views

Unit tests on registers with bare metal programming

I'm trying to do a unit test by using the library "check.h" on a register containing a hexadecimal number to check if the return value is correct. The registers are for programming an ...
Norronas's user avatar
6 votes
2 answers
226 views

Issue with measuring ARM MCU interrupt latency

Introduction I am a student who wants to roughly measure the interrupt latency of ARM Cortex-M series chips without using an oscilloscope. However, I have encountered a very peculiar issue that has ...
MasterLu's user avatar
0 votes
3 answers
127 views

How to do unaligned int store on ARM Cortex M4? [duplicate]

How can C code take advantage of the Cortex M4's unaligned 4-byte store instruction? *(int*)p = x mostly works, but occasionally I end up with something like this: void Store(uint8_t* p, uint32_t a, ...
personal_cloud's user avatar
0 votes
0 answers
142 views

I cant get my thread context switching code to work (ARM procesor)

Im developing a "operating system" on ARM. My context switching code for swapping between tasks is not working. I have a function demo() which I am calling in main. In this I am creating a &...
ajsdiubfaoishd's user avatar
0 votes
0 answers
34 views

Conditional watchpoint on NXP LPC55S28

I need to debug a program that sets a specific memory location to 0 unexpectedly while running, leading to a hardfault down the line. I want to catch that memory write with a conditional watchpoint. ...
DarkFranX's user avatar
  • 500
2 votes
1 answer
180 views

Why does PRIx64 print "lx" instead of 16 hex chars?

We've run into an issue at work where we were not able to use the "portable" types from <inttypes.h> (PRIx64) to correctly print a 64-bit unsigned integer in hexadecimal format. ...
DarkFranX's user avatar
  • 500
2 votes
0 answers
92 views

lib gcc _init() function executing address as instruction

Compiling with gcc-arm-none-eabi and default libc for a cortex M4 target will result in an _init() function that executes a memory location as if it was an isntruction. Dissasembly of the _()init is: ...
Luis Sanchez's user avatar

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