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2 votes
0 answers
82 views

Embedded C++ - Header-only library optimization level

I mainly develop firmware for ARM Cortex M using gcc and I am migrating from C to C++ and even though I am overall happy with the transition, there are some things that I just can't get right. ...
sblanco's user avatar
  • 31
0 votes
1 answer
63 views

ARM GCC fails to create a working binary for STM32F4, lot of discarded code

I've been migrating all my STM32 projects to Codeblocks IDE and GCC compiler (arm-none-eabi). The process is using STM's CubeMX to generate the base code, then merge everything to a proper folder with ...
ggadde29's user avatar
0 votes
1 answer
47 views

Is there a way to add Local Symbol names in the ELF file by adding debug flags to the arm-none-eabi-gcc compiler?

I am able to view the global symbols such as functions, global/static variables in the final built executable in elf file. I am looking for compilation flags that can add the local variable names into ...
Ranjith Kumar's user avatar
0 votes
0 answers
47 views

Why veneer code generated by gcc for cortex-m0 seems 8-byte aligned?

The interesting observation I made recently while using GCC to compile for a Cortex M0 is that the veneer code generated in my project appears to be aligned to 8-byte boundaries. Slightly modify the ...
mzhou's user avatar
  • 11
-1 votes
1 answer
71 views

Why gcc is not using S16-S31 registers of Cortex M7?

Cortex M7 with the FPv5 extension has 32 single precision floating point registers (or 16 double precision registers). GCC version 10.3.1 20210824 (release) (GNU Arm Embedded Toolchain 10.3-2021.10) ...
Wojciech Jakóbczyk's user avatar
0 votes
3 answers
127 views

How to do unaligned int store on ARM Cortex M4? [duplicate]

How can C code take advantage of the Cortex M4's unaligned 4-byte store instruction? *(int*)p = x mostly works, but occasionally I end up with something like this: void Store(uint8_t* p, uint32_t a, ...
personal_cloud's user avatar
1 vote
0 answers
152 views

Baremetal Cortex-M7 gcc and unwind tables without libunwind

I'm working on a project using an STM32H743 MCU which has a Cortex-M7. I'm building outside of ST's toolchain and IDE with gcc-arm-none-eabi (13.2 Rel 1). My project is written entirely in C and ...
David Wotherspoon's user avatar
0 votes
1 answer
35 views

ARM GCC 10.3 & 13.x - invalid parameter for a function pointer with -Os

In Cortex-M7, I have a function, compiled with -Os, that is in the specific address, and I call it through the function pointer, like so (+1 is for thumb mode): //Some code above... memset(.......
unalignedmemoryaccess's user avatar
2 votes
0 answers
92 views

lib gcc _init() function executing address as instruction

Compiling with gcc-arm-none-eabi and default libc for a cortex M4 target will result in an _init() function that executes a memory location as if it was an isntruction. Dissasembly of the _()init is: ...
Luis Sanchez's user avatar
0 votes
2 answers
410 views

ARM Cortex-M4F sqrtf uses double

I am working on code for a arm Cortex-M4F with a fpv4-sp-d16 and ABI=hard. As i was looking with Ozone into my elf file I found that my code uses some double precision functions: eg. __aeabi_dmul If I ...
Omega's user avatar
  • 37
2 votes
2 answers
354 views

Floating point subtraction using sign bit flip and add

Taking double subtraction code from this question Replacing __aeabi_dsub to save space (-flto issues) and adjusting it slightly (both for double and float values): extern "C" double ...
Daniel Jour's user avatar
  • 16.1k
1 vote
0 answers
336 views

Triggering faults on Cortex-M7 MCU

I wrote a Fault Handler for an ARM Cortex-M7 microcontroller project and now I have the interesting yet somewhat challenging task of testing it with different types of faults. We have a simple self-...
TKKS's user avatar
  • 543
0 votes
1 answer
125 views

Can you skip the bootloader with GCC/Cortex-M0+?

I'm writing fairly simple production test application for a small ARM Cortex-M0+ controller ATSAMD20J16. I'm using Microchip (Atmel) Studio 7 for this purpose. This will have a bootloader in ...
Barleyman's user avatar
  • 165
0 votes
1 answer
148 views

gcc, arm, inline assembly, BX produce unexpected results trying to jump over a goto section

I am using Cortex M0+; I am trying to preserve a piece of code inside the regular code flow, don't ask me why :) Basically later on, I'd like to jump to MYCODE. This is the code bool x = false; // ...
yo3hcv's user avatar
  • 1,609
0 votes
1 answer
127 views

Cortex M0+/GCC Division with Rounding

I'm trying to implement an integer division with rounding. Obviously, by default integer division does floor and I was thinking I could use the remainder to determine if I should add 1 to my result. ...
spizzak's user avatar
  • 1,127

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