All Questions
Tagged with cortex-m bare-metal
30
questions
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27
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Build valgrind to target LPC55S69(which is based on Armv8-m architecture)
I'm trying to build valgrind to target baremetal arm cortex-m (based on armv8-m architecture). The host is a x86 wsl environment. How do I specify this while trying to configure valgrind.
For ex: To ...
-1
votes
1
answer
111
views
Unit tests on registers with bare metal programming
I'm trying to do a unit test by using the library "check.h" on a register containing a hexadecimal number to check if the return value is correct. The registers are for programming an ...
- 21
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135
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qemu: fatal: Lockup: can't escalate 3 to HardFault (current priority -1)
I have encountered this error while working with QEMU, specifically a Hardfault error when emulating the MPS2AN505 with a Cortex-M33 core. The error I am facing is as follows:
qemu: fatal: Lockup: can'...
- 1
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votes
1
answer
94
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flex/bison for embedded bare-metal system
I develop software for Cortex M, and for that I use Arm GNU Toolchain.
I need to parse data packages for which I have the grammar.
I have problems with flex though, since it normally requires the ...
- 1,408
1
vote
1
answer
698
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Inserting inline assembly code into C function - I/O questions
I am developing an embedded C application for my Cortex M3 microcontroller using the GNU arm-none-eabi toolchain.
I have plan to adopt an assembly subroutine that the vendor implemented into my C ...
- 23
2
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0
answers
643
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How do the `aapcs` and `aapcs-linux` ABI options differ when compiling for bare-metal ARM with gcc?
I am trying to port an application to ARM's arm-none-eabi-gcc toolchain. This application is intended to run on a bare-metal target.
The only two suitable values for the -mabi option in this case ...
- 1,579
0
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1
answer
48
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Where is ARM's (LPC18xx's) shadow pointer
I am working with an NXP LPX1837.
User manual UM10430, sec 4.3 talks about
The LPC 18xx contains a shadow pointer that allows areas of memory to be mapped to address 0x0.
and
set ARM's shadow ...
- 31
-1
votes
1
answer
696
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Cortex M33 missing vector table
I want to test my ARM project within QEMU using semihosting. Initially I built for Cortex A7 and A9 processors and had no issues running my code, however now that I switched to CM33 (and a CM33 board),...
- 104
1
vote
1
answer
799
views
how can I exclude libc from my bare metal arm compilation?
I am trying to compile my first bare metal project targeting an arm cortex-M0+ MCU. I am compiling with gcc arm-none-eabi. The system currently consists of:
boot.s -- an assembly file containing ...
- 2,734
0
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246
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Cortex-M0 Hardfault Handler does not get called after changing it
i am using an using an STM32f0 and getting into Hardfault. My IDE is Keil MDK. I was trying to find the roots of it, so every approach i find in the web (mostly for M3/M4) tells to unwind the stack. ...
- 63
0
votes
4
answers
445
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Reading from flash that's not part of the application
I'm programming bare-metal embedded, so no OS etc. on a STM32L4 (ARM Cortex M4). I have a separate page in flash, which is written by a bootloader (it is not and should not be part of my application ...
- 1
2
votes
0
answers
1k
views
Suppressing section '.ARM.exidx' with clang / llvm
I am trying to compile a bare-metal ARM Cortex-M3 program with clang. (Code and linker script work fine with gcc.)
My issue is that clang seems to emit a section .ARM.exidx whether it is needed or ...
- 7,610
2
votes
2
answers
3k
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How to get a hard fault exception with a simple or instruction on arm
Currently we are hunting a phantom, which is in the form that when we compile in some code (without calling it) one specific call to memset generates an hard fault exception.
The address and length ...
- 19.8k
0
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0
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456
views
Using Boost.coroutine2 on ARM bare-metal
I'm working on some embedded project, and I'd like to use coroutine in ARM cortex-M. Unfortunately, Boost.coroutine2 (which uses Boost.context inside) does not officially support it. Is there any way ...
- 1,717
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238
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cortex M3 bare metal execution
I am working on a STm32 project in Keil IDE. It contains a start-up file named startup_stm32f10x_xl.s has the following code in it
; Reset handler
Reset_Handler PROC
EXPORT ...
