Questions tagged [cortex-m]
For all ARM Cortex-M series cores, including M0, M0+, M1, M3, M4, M7, M23 and M33.
cortex-m
1,422
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STM32G030 refuses write to flash
The microcontroller throws an error when I'm trying to modify its flash.
The memory looks to be unlocked, here is screenshot of option bytes
The microcontroller is soldered into a custom board, with ...
- 67
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1
answer
77
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Unable to read value from gpio set as input
I am working on a custom board with two IMX7ULP. The thing I'm trying to do seems quite simple, the A7 from one IMX7ULP send a signal to the M4 of the other IMX7ULP, just an electrical signal, one of ...
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Microcontroller hangs with LWIP UDP
I am using LWIP TCP/IP Stack on SAME70 without RTOS. Microcontroller hangs and stops responding after few seconds.
it stops sending data over serial
I echo UDP data back to the client for testing, ...
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Can't connect ST-Link with APM32F003 through OpenOCD
I'm using CLion and try to debug my APM32F003 base project with ST-Link.
I cannot determine what the problem is with ST-Link.
I'm using Geehy's OpenOCD build with APM32F003 config files.
My project ...
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2
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VTOR not found in STM32F030
when attempting to jump to the bootloader App code address on an STM32F030 microcontroller . I cannot find the vector table offset register. Can anyone provide guidance on how to successfully perform ...
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Unit tests on registers with bare metal programming
I'm trying to do a unit test by using the library "check.h" on a register containing a hexadecimal number to check if the return value is correct. The registers are for programming an ...
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35
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Force .bss section to be in last program header
I'm wondering if it's possible to force the .bss section (or any section for that matter) to be put in the last program header in my linker script, or using some other tool after linking?
My issue is ...
- 613
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98
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J-Link script to flash program in S32K144 (allow security)
I want to secure S32K144 using J-Link script but not able to program the security bits and hence verification failed.
So how to specify device S32K144 (allow security) in J-Link script?
I have ...
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1
answer
56
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Cortex-M external interrupt occurs when executing fault handler with higher priority
What happens when a lower priority interrupt from a peripheral occurs while the cortex-m is executing a higher priority fault handler? Will it be ignored or will it trigger a hardfault?
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Why gcc is not using S16-S31 registers of Cortex M7?
Cortex M7 with the FPv5 extension has 32 single precision floating point registers (or 16 double precision registers).
GCC version 10.3.1 20210824 (release) (GNU Arm Embedded Toolchain 10.3-2021.10) ...
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226
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Issue with measuring ARM MCU interrupt latency
Introduction
I am a student who wants to roughly measure the interrupt latency of ARM Cortex-M series chips without using an oscilloscope. However, I have encountered a very peculiar issue that has ...
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What is the most efficient way to write two (for example) bits of a register using cortex-m0 instruction set?
Simple example. We want to write '01' bits in the most right bits of register.
Should we reset '0' bit and set '1' bit separately? Is there a way to do it in a single instruction?
For instance, if the ...
- 27
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3
answers
127
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How to do unaligned int store on ARM Cortex M4? [duplicate]
How can C code take advantage of the Cortex M4's unaligned 4-byte store instruction?
*(int*)p = x mostly works, but occasionally I end up with something like this:
void Store(uint8_t* p, uint32_t a, ...
- 4,294
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FreeRTOS Faults on Optimization
Environment
The dev environment is Microchip (ex-Atmel) Studio. The target processor is a ATSAMC21G18A on a custom PCB. FreeRTOS version 8.0.1 is being used, being provided directly by ASF.
How ...
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I cant get my thread context switching code to work (ARM procesor)
Im developing a "operating system" on ARM. My context switching code for swapping between tasks is not working.
I have a function demo() which I am calling in main. In this I am creating a &...
