Questions tagged [position-independent-code]
The position-independent-code tag has no usage guidance.
position-independent-code
103
questions
0
votes
0
answers
22
views
Compile a PIE ELF program with different offsets in different sections
I am working on a research project where I need to compile a program with multiple sections. These sections need to be loaded with different PIE offsets. I am wondering how I can do it in GCC.
See ...
1
vote
0
answers
19
views
Position-Indipendent FW for Cortex M
Due to a educational requirement, I need to write a FW that can be run in RAM at non-predetermined locations.
First of all I don't know which gcc parameters are needed, although I think it's either -...
2
votes
0
answers
279
views
Function Pointers in position independent code (-fpic) on stm32 gcc
I am trying to write a position independent firmware for an stm32 arm-cortex microcontroller compiled with gcc.
So far I have managed to successfully launch my application firmware from an offsetted ...
3
votes
0
answers
261
views
Position Independent Code on STM32 - pointers
I've managed to build and run position independent code on STM32. Vector table and GOT are patched. Everything works, but I have problem with such code.
double myAdd(double x) {
return x + 0.1;
}
...
1
vote
1
answer
341
views
Should gcc -fPIC option be used when compiling for x86_64 architectures?
The gcc documentation states, "This option makes a difference on AArch64, m68k, PowerPC and SPARC." I don't see the x86 or x64 architectures listed. AArch64 is related to ARM processors ...
4
votes
1
answer
3k
views
Understanding a DT_TEXTREL warning
I have the following code
global main
section .text
main:
mov rax, 1
mov rdi, 1
mov rsi, msg
mov rdx, 6
syscall
mov rax,60
xor rdi,rdi
...
0
votes
1
answer
754
views
When static library needs position independent code
There are 3 files a.c, b.c, main.c:
// a.c
int a() { return 123; }
// b.c
extern int a();
int b() { return a(); }
// main.c
#include <stdio.h>
extern int b();
int main() {
printf("%d\...
1
vote
0
answers
431
views
Position Independent Code, GCC versus ARMCC
We have a bunch of C code that needs to be compiled as position independent code on an embedded system (Cortex-M7). This all works fine with ARMCC (--ropi --rwpi).
Now we need to do the same under ...
0
votes
0
answers
2k
views
CMake: Do I need to set POSITION_INDEPENDENT_CODE here and what exactly is its purpose?
I am currently reading "Modern CMake for C++" ([1]) and I am at page 193 where the concept of "position independent code" is explained. However it is only explained in one page and ...
0
votes
1
answer
130
views
GCC: how -pie affects address of file scope variable?
Consider this code:
#include <stdio.h>
int gprs[32];
int main(void)
{
printf("%p\n", (void*)&gprs);
}
being compiled with -pie (seems to be the default) produces:
...
0
votes
1
answer
1k
views
How to find address of function in memory?
I am currently completing a CTF exercise where i must attempt to overwrite a function pointer on the stack through a buffer overflow here is the code:
#include <err.h>
#include <stdio.h>
#...
1
vote
1
answer
856
views
Why does modern GCC compile files as PIE by default?
As far as I know PIC is used primarily for shared libs, so there is no intent for GCC to compile an executable as PIE unless it was hinted to do it. Also PIE executables are not so useful because in ...
1
vote
0
answers
182
views
Is there a way to tell if a Windows binary is a PIE
There are a ton of scripts/tools our there to tell if an ELF binary is a position independent executable. Does anyone know of an easy way to tell if a Windows binary is?
1
vote
0
answers
79
views
Why can `%rip + displacement` access data section? [duplicate]
The usage of this is that I saw after used gcc -S.
I know ary represents the first address of the sequence, then I also know leaq ary(, %rdi, 4) has the same effect(assume %rdi equals 0).
But I don't ...
0
votes
2
answers
388
views
Move the PC into another register with xtensa (lx6) cores
I'm trying to get the current PC value into an assembly routine written for xtensa (lx6) cores. After digging into the instruction set doc, I cannot see really how to achieve this. It looks as if the ...