All Questions
1,501
questions
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When cross-compiling for an ARM embedded target using GCC, is it reasonable to expect the Windows and Linux versions to produce identical output?
I have a build for an ARM embedded target that is developed using eclipse and GCC toolchain release 12.2-rel1.
I have set up a build in TeamCity that runs in a Linux-based Docker container, also using ...
- 13.7k
0
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0
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32
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Different execution times for the same code
I'm working with the Texas Instruments (TI) RM57L843 microcontroller, where I'm observing the execution time of a for loop that performs matrix multiplication. I compiled the same code using TI's ...
- 1
-2
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0
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54
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Address sanitizer CHECK failed [closed]
I am writing a program using the gcc-linaro-arm-linux-gnueabihf-4.9-2014.09_linux toolchain. There is a task to check if there are any memory leaks in the program.
I saw in tutorials that adding ...
- 11
0
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33
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Linker problem while retargeting newlib with static library [duplicate]
I use a Gnu Arm toolchain with GCC v12.3.
I want to do some retargeting on my stm32. For this, I have a file stdlib_override.cpp:
#include <cerrno>
#include <sys/stat.h>
#include <sys/...
- 618
0
votes
1
answer
123
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Neon on Raspberry Pi 5 to accelerate RGB2GRay, 128bit (Q register) slower than 64bit(D register), why?
As the title says, I have a Raspberry Pi 5 (Cortex-A76 by Armv8; four cores), and I use OpenCV to do something on it.
I use cv::cvtColor to get RGB2Gray, it is slow on Raspberry Pi 5, so I use ...
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25
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What libraries did I missed in this u-boot compile?
In file included from ./arch/arm/include/asm/armv7.h:60,
from arch/arm/mach-stm32mp/stm32mp1/psci.c:8:
arch/arm/mach-stm32mp/stm32mp1/psci.c: In function 'psci_arch_cpu_entry':
arch/...
3
votes
1
answer
89
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section of static library is changed with unkown reason
I am using arm-none-eabi-gcc (V6.3), and CPU core is ARM COrtexM0.
In my linker file, I make 2 sections for text and rodata.
The .text section is for all the C code text and rodata, except for the ...
- 41
1
vote
0
answers
69
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GCC makefile doesn't output elf file
I have the following makefile and it keeps failing with an error 1, no such file or directory, when it tries to load CanbusTest,elf - what am I doing wrong as it seems like everything is as it should, ...
- 45
0
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43
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Install gcc-8-i686-linux-gnu in debian10 aarch64 not working
I am working on some project in debian10 and want to install package gcc-8-i686-linux-gnu. To do it I execute the following command apt-get install gcc-8-i686-linux-gnu. What is surprising though is ...
- 185
2
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0
answers
62
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GCC ignores already stored constant in FPU register on -O2
I got simple function that calculates sin cos :
https://godbolt.org/z/v61GP9qvj
Compiler flags set for cortex m4 MCU with FPU
question is why in disassembly at line 34:
vldr.32 s13, .L35+20
it loads 0....
- 51
0
votes
1
answer
64
views
ARM GCC fails to create a working binary for STM32F4, lot of discarded code
I've been migrating all my STM32 projects to Codeblocks IDE and GCC compiler (arm-none-eabi).
The process is using STM's CubeMX to generate the base code, then merge everything to a proper folder with ...
- 11
4
votes
1
answer
102
views
Does GCC guarantee size-matched accesses?
I'm not really sure how to ask this question succinctly, so I apologize if this is already asked and answered.
I am working on an ARM platform with a 32-bit pseudo-register access to a peripheral FIFO....
- 1,476
0
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0
answers
69
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arm-linux-gnueabihf-gcc compiles for armv7 and armv8 although configured for armv7?
I have downloaded version 13.2 of the official ARM linux gnueabihf toolchain from ARM.
I checked the configuration command line:
$ /opt/arm-gnu-toolchain-13.2.Rel1-x86_64-arm-none-linux-gnueabihf/bin/...
- 651
4
votes
2
answers
148
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Bad BLX instruction generated when calling asm function from C function (gcc on STM32H753)
Context is: STM32H753 bare-metal software compiled with arm-none-eabi-gcc.
The reset handler is implemented in C and located in Flash memory:
void reset_handler_c(void)
{
asm_func();
}
The asm ...
- 2,598
0
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0
answers
47
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Why veneer code generated by gcc for cortex-m0 seems 8-byte aligned?
The interesting observation I made recently while using GCC to compile for a Cortex M0 is that the veneer code generated in my project appears to be aligned to 8-byte boundaries.
Slightly modify the ...
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