Questions tagged [x86]
x86 is an architecture derived from the Intel 8086 CPU. The x86 family includes the 32-bit IA-32 and 64-bit x86-64 architectures, as well as legacy 16-bit architectures. Questions about the latter should be tagged [x86-16] and/or [emu8086]. Use the [x86-64] tag if your question is specific to 64-bit x86-64. For the x86 FPU, use the tag [x87]. For SSE1/2/3/4 / AVX* also use [sse], and any of [avx] / [avx2] / [avx512] that apply
17,437
questions
2
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LNK2019 unresolved external symbol in function defined in static library
I am trying to compile a driver through the use of cl.exe on Windows 10. It is written in pure C. I am using the Enterprise Windows Driver Kit to provide source files and compiling for X86. I ...
2
votes
0
answers
35
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How to Optimize Cache Line Read Access with Minimal Writer Cache Impact on x86?
I'm working with an x86 processor and need to read data that resides in another processor's cache line. I am coding in C++. The data is initially in an Exclusive (E) or Modified (M) state in the owner’...
0
votes
1
answer
57
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How to use x86-64 SIMD vector instructions and registers for polynomial evaluation
I need to write a x86-64 assembly function that uses x86 vector/SIMD instructions and the %ymm registers to evaluate this expression: x*(x*(a*x + b) + c) + d.
The function will have this signature: ...
0
votes
0
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43
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Are the Retirement unit/Reorder Buffer (ROB) one for the whole processor or one per core?
Is there one Retirement unit/Reorder Buffer (ROB) per core or one for the whole processor? Also, is there one retirement unit per core or one for the whole processor?
To be honest, I'm not even sure ...
1
vote
0
answers
35
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How to check if IOMMU is enabled in the kernel?
How can I check if IOMMU is enabled in my kernel module?
Is there an API for it?
I've searched in
https://github.com/torvalds/linux/blob/master/arch/x86/kernel/pci-dma.c
https://github.com/torvalds/...
3
votes
2
answers
125
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Why does this assembly implementation of strcmp behave unexpectedly?
I've been writing my own naive implementation of the strcmp function in x86_64 assembly.
I've written a c test program to compare the behavior with the real strcmp from the C library.
Even if both ...
0
votes
0
answers
56
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Create buffer on stack in x86_64 assembly to print number
when trying to print numbers in assembly instead of number i'm getting O=N84NioR/\_dsPfec IS/pRDNui/0SmL3lSegmentation fault
i'm using Linux with NASM
my code is:
_printNum: ;prints number stored ...
-1
votes
1
answer
56
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Why does operand 1 in a modr/m byte change depending on the decoding mode
I'm trying to figure out why the instruction changes from add [eax], al to add [rax], al when changing the decoding mode from x86 to x64.
The instruction bytes are 00 00
I think it might be because ...
-3
votes
0
answers
79
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function call crash on amd [closed]
I made a exe and a dll. Dll calling function in exe. it is fine in intel system but it is crash when amd system.
asm
{
push ebp -> crash here most of the time
mov esp,ebp -> crash here rarely
...
4
votes
0
answers
105
views
Run time depends on code after the measured part
Consider the following C++23 program (online).
#include <chrono>
#include <cstdio>
#include <print>
constexpr size_t NWrites = 10000000000;
#define DEST_STORAGE static
#define ...
0
votes
1
answer
87
views
Why does loading EAX from a byte array not compare equal to the literal I expected?
I am new to assembly and was trying to work with an array. However, I was geting caught when try to compare the array value to a constant stored in a register.
From the following code I was expecting ...
1
vote
0
answers
22
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the Perf event issues of hardware prefetcher (all_pf_data_rd and pf_l2_data_rd)
My platform is 2nd generation scalable Xeon, equipped with a non-inclusive cache. I run a series of tests that had the L2 stream prefetcher aggressively prefetching.
I use Perf to monitor performance, ...
-1
votes
0
answers
48
views
How does SYSCALL save the userspace RSP?
On a x86 CPU running in long mode, how is the user-mode $RSP value saved after the SYSCALL instruction by the kernel's handler function?
When changing from user mode (CPL=3) to kernel mode (CPL=0), ...
4
votes
1
answer
164
views
Understanding the flow of the kernel upon receiving a SIGSEGV for null-dereference
I'm trying to figure out the sequence of things that occur inside the Linux kernel (x86_64, v6.9) when we write these two codes:
// Null-dereference + writing to page zero
*(char *)0 = 0;
// Null-...
1
vote
1
answer
57
views
gnu inline assembly constraint `i` for memory address
Recetly, this function rip_rel_ptr has been added to Linux kernel.
https://elixir.bootlin.com/linux/latest/source/arch/x86/include/asm/asm.h#L118.
I can compile the kernel, but when I copy this ...