All Questions
2,577
questions
0
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40
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cc -o out out.s on macOS with M1 chip
I have been learning the chapter of 04_Assemblyhttps://github.com/DoctorWkt/acwj/tree/master/04_Assembly. According to the README.md, after I typed cc -o comp1 -g cg.c expr.c gen.c interp.c main.c ...
0
votes
1
answer
28
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Why CSAPP say Gcc do not use vcvtss2sd?
Computer Systems: A Programmer's Perpective (3rd), in section 3.11.1, say "Suppose the low-order 4 bytes of %xmm0 hold a single-precision value; then it would seem straightforward to use the ...
1
vote
1
answer
57
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gnu inline assembly constraint `i` for memory address
Recetly, this function rip_rel_ptr has been added to Linux kernel.
https://elixir.bootlin.com/linux/latest/source/arch/x86/include/asm/asm.h#L118.
I can compile the kernel, but when I copy this ...
1
vote
0
answers
67
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Assembling with gcc gives error operand type mismatch for `cmp' for some integers, not others
This is a weird one. I'm using gcc to assemble a program and I want to know if the value in register rsi fits in 32 bits, so I use this instruction:
cmpq $0xffffffff, %rsi
I get back an error that ...
2
votes
2
answers
104
views
Why is the assembly code generated with gcc under windows unable to be assembled under WSL?
I learned that assembly code doesn't depend on the OS. For verification, I generate the assembly code of the following code snippet (named test.c) under windows and try assembling it under WSL.
int ...
0
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0
answers
62
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what does .LC* and .L* mean and what is its purpose in assembly?
(the asterixes in the title count as an incrementing number)
It looks like ".LC0" always has something to do with the main method and that ".LC*" always have something to do with ...
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0
answers
91
views
How to turn C Code into Assembly Code that a dissasembler would produce, using GCC?
I want to learn Assembly so I can reverse engineer disassembled Programs eventualy. I figured it would be best to learn C with Assembly side by side.
I know now that there are different stages ...
20
votes
2
answers
870
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How is this function's assembly implementing the conditional?
The following code,
int foo(int);
int bar(int);
int foobar(int i) {
int a = foo(i);
int b = bar(i);
return a == b ? a : b;
};
with GCC trunk is compiling to this assembly:
foobar(int):
...
1
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0
answers
78
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Question about String Reversal in C Code: Why does the string appear reversed at the end?
I have this C code where I am trying to reverse a string using inline assembly. However, I am curious to know how the reversed string is displayed at the end:
printf("Reversed string: %s\n", ...
1
vote
1
answer
78
views
Assembly error when compiling C code with ASM instructions
I'm new to assembly language programming and I'm having a problem with a C program that incorporates assembly instructions (ASM) to reverse a string. The code works without errors on my Debian virtual ...
-1
votes
1
answer
96
views
Issue with string length validation in assembly and C
I'm new to assembly language and I'm working on a program that combines assembly language with parts written in C. My goal is to prompt the user to input a string of characters and ensure that it does ...
0
votes
1
answer
70
views
GCC output Arm64 assembly instructions
I have a c program on a raspberry pi. I am trying to get the assembly of the code I have written. As the Raspberry Pi is an ARM64 processor I was expecting the assembly to be in ARM64.
Command: gcc -S ...
1
vote
1
answer
125
views
What is the reasoning behind this boilerplate start-up code?
Here's a snippet from disassembled output of a simple program with gcc on Linux:
400478: ff 15 6a 0b 20 00 callq *0x200b6a(%rip) # 600fe8 <__libc_start_main@GLIBC_2.2.5>
...
0
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0
answers
89
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How to compile to RISC-V?
I'm writing the final stage for my compiler to riscv; however, I have run into a minor issue of figuring out what the start point of the program is. Are we guaranteed that the PC starts execution with ...
2
votes
0
answers
62
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GCC ignores already stored constant in FPU register on -O2
I got simple function that calculates sin cos :
https://godbolt.org/z/v61GP9qvj
Compiler flags set for cortex m4 MCU with FPU
question is why in disassembly at line 34:
vldr.32 s13, .L35+20
it loads 0....