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4-bit adder simulation example

4-bit adder simulation example - FPGA Tutorial

From the course: Learning FPGA Development

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4-bit adder simulation example

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- [Instructor] Now let's take a look at my implementation of the FourBitAdder. This is Quartus Prime, where I'll use the ModelSim simulator. If you take a look at the code, the first thing I want you to notice is in line one where we have the timescale directive indicating that each time step takes one nanosecond and that the resolution of the simulation will be in steps of 100 picoseconds. Now, if you look at line eight, you'll see the instantiation of a FourBitAdder named adder, and it has the usual connections, two registers, A and B, as the inputs, and the Sum wire array and the Cout wire as its outputs, and looking at the simulation, you will see that starting at line 12, we have zero plus zero assigned to A and B. Then after five nanoseconds, we have to add one plus three, then four plus eight, and finally, 12 plus 10. We are interested in seeing how our system behaves and what results it yields from those input values. The stop command in line 17 causes the simulation to stop…

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