Location - Longmont CO (preferred), or Boise Idaho
Candidate should be local\
Description -
Duties and Responsibilities
Interface in cross functional teams to ensure the design meets all firmware, diagnostic and system level requirements.
Participate in architecture definition, design reviews, requirements generation of SSD products.
Perform basic SI measurements, such as TDR, TDT, crosstalk, jitter, eye pattern and power plane noise measurements to validate SI and power integrity (PI) designs.
Document and communicate results with cross functional counterparts.
Simulate and analyze design proposals, review results and provide recommendations on optimal design practices to other design engineers.
Experienced in designing hardware for large scale manufacture, including DFx and low cost considerations
Hardware design, worst-case analysis, simulations, capture schematic, de-rating and assumes complete ownership of the SSD hardware thru the product lifecycle.
PCB back-end process: defining stack-up and via technologies, part placement, setting design constraints, signal integrity and power integrity analysis
Works proactively with cross functional team members during design, verification as well as on RMAs
In addition to design, a successful candidate will mentor and provide technical guidance to other hardware team members
Critical Skills
Self-motivated. Desire to take on challenges. Result-driven and details oriented.
Strong interpersonal and communication skills are a must.
Strong in transmission line fundamentals. Understand the fundamentals of time-domain vs. frequency-domain.
In depth knowledge in circuit designs, as well as semiconductor design.
Good PCB design experience on high-speed signals routing guideline and review, power copper routing and review, design for EMI/ESD protection.
Design for signal integrity, including SerDes, power and interconnect.
Develops solutions to complex signal integrity problems, which require ingenuity and creativity.
Simulation skills with SPICE and IBIS. Experience with Hspice.
Practical experience with design tools:
Cadence Sigrity, Allegro Power-Aware SI
Mentor Graphics HyperLynx
Practical lab SI analysis experience using:
High-bandwidth measurements (20-35GHz) via:
Teledyne Lecroy SDA820Zi-B Oscilloscope
Agilent MSO-X 92004A Oscilloscope
PCIe Compliance equipment (requires also using one of the following test equipment)
Teledyne Lecroy PER-R008-S01-X Protocol Aware Bit Error Rate Tester
Keysight J-BERT M8041A # Protocol Aware Bit Error Rate Tester
Qualification Requirements
BS in Electrical Engineering required; MS in Electrical Engineering is preferred
10+ years of relevant design experience
Excellent written and verbal communication
Excellent problem-solving skills
Seniority level
Mid-Senior level
Employment type
Contract
Job function
Engineering and Information Technology
Industries
Software Development
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