Nicolas Jarrige

Nicolas Jarrige

Mesa, Arizona, United States
2K followers 500+ connections

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Experience & Education

  • NXP Semiconductors

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Publications

  • Enhanced Clamp Inductive Switching for Automotive DC Motor Control

    PCIM 2011 Asia

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Patents

  • BUS DRIVER FOR AVOIDING AN OVERVOLTAGE

    Issued US 20110175592


    An electrical circuit for manipulating at least one of a voltage and a current on a bus wire comprises a first switch having a first gate, a first source, and a first potential reduction unit. The first potential reduction unit is suitable for lowering a potential difference between the first gate and the first source of the first switch, wherein the lowering of the potential difference is caused by a shutting-off of a first control voltage.





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  • Quiescent current (IDDQ) indication and testing apparatus and methods

    Issued US US8476917 B2

    An embodiment of an electronic device includes a logic circuit, a switching element, and a quiescent current (IDDQ) evaluation circuit. The logic circuit is coupled to a first ground node. The switching element is coupled between the first ground node and a second ground node. The switching element is configurable in an electrically non-conductive state when the electronic device is in an IDDQ evaluation state, and in an electrically conductive state when the electronic device is not in the…

    An embodiment of an electronic device includes a logic circuit, a switching element, and a quiescent current (IDDQ) evaluation circuit. The logic circuit is coupled to a first ground node. The switching element is coupled between the first ground node and a second ground node. The switching element is configurable in an electrically non-conductive state when the electronic device is in an IDDQ evaluation state, and in an electrically conductive state when the electronic device is not in the IDDQ evaluation state. When the electronic device is in the IDDQ evaluation state, the IDDQ evaluation circuit is configured to provide a first output signal when an IDDQ indicating voltage across the first and second ground nodes exceeds a reference voltage. Other embodiments include methods for producing an indication of IDDQ in an electronic device and methods for fabricating an electronic device with the capability of producing an IDDQ indication.

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Languages

  • English

    Full professional proficiency

  • French

    Native or bilingual proficiency

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